Difference between revisions of "ICP Etching Recipes"

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*[[media:Panasonic1-SiO-Etch.pdf|SiO<sub>2</sub> Vertical Etch Recipe Parameters - CHF<sub>3</sub>]]
 
*[[media:Panasonic1-SiO-Etch.pdf|SiO<sub>2</sub> Vertical Etch Recipe Parameters - CHF<sub>3</sub>]]
 
*[[media:Panasonic1-SiO2-Data-Process-Variation-CHF3-revA.pdf|SiO<sub>2</sub> CHF<sub>3</sub> Etch Variations]]
 
*[[media:Panasonic1-SiO2-Data-Process-Variation-CHF3-revA.pdf|SiO<sub>2</sub> CHF<sub>3</sub> Etch Variations]]
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==SiN<sub>x</sub> Etching (Panasonic 1)==
  +
*[[media:Panasonic1-SiN-Etch-Plasma-CF4-O2-ICP-revA.pdf|SiN<sub>x</sub> Etch Rates and Variations - CF<sub>4</sub>]-O<sub>2</sub>]
   
 
==Al Etch (Panasonic 1)==
 
==Al Etch (Panasonic 1)==

Revision as of 15:04, 22 October 2013

Back to Dry Etching Recipes.

Si Deep RIE (PlasmaTherm/Bosch Etch)

Single-step Si Etching (not Bosch Process!) (Si Deep RIE)

ICP Etch 1 (Panasonic E626I)

SiO2 Etching (Panasonic 1)

SiNx Etching (Panasonic 1)

  • [[media:Panasonic1-SiN-Etch-Plasma-CF4-O2-ICP-revA.pdf|SiNx Etch Rates and Variations - CF4]-O2]

Al Etch (Panasonic 1)

Cr Etch (Panasonic 1)

Ti Etch (Panasonic 1)

AlGaAs Etch (Panasonic 1)

GaN Etch (Panasonic 1)

ICP Etch 2 (Panasonic E640)

SiO2 Etching (Panasonic 2)

SiNx Etching (Panasonic 2)

Al Etch (Panasonic 2)

GaAs Etch (Panasonic 2)

ICP-Etch (Unaxis VLR)

GaAs Etch

AlGaAs Etch

InP Etch (Unaxis VLR)

InP Etch

InP Etch (H2 Ar)

GaN Etch (Unaxis VLR)