Difference between revisions of "Unaxis VLR Etch - Process Control Data"

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[[PECVD1-(PlasmaTherm 790)|PECVD SiO2]] hardmask, patterned on [[Stepper 1 (GCA 6300)|Stepper #2 (AutoStep 200)]] & [[ICP Etch 1 (Panasonic E626I)|Panasonic ICP #1]]  
 
[[PECVD1-(PlasmaTherm 790)|PECVD SiO2]] hardmask, patterned on [[Stepper 1 (GCA 6300)|Stepper #2 (AutoStep 200)]] & [[ICP Etch 1 (Panasonic E626I)|Panasonic ICP #1]]  
 
{| class="wikitable"
 
{| class="wikitable"
| colspan="6" |'''InP Ridge Etch''': TO BE ADDED 90s Etch
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| colspan="6" |'''InP Ridge Etch''':   °C, mT, W/W, Cl2=, H2=, CH4=sccm, time=1min30sec (90sec)
Sample Size: EXAMPLE: 1x1cm, ~30-40% SiO<sub>2</sub> masking (NingC's pattern). Silicon carrier, no adhesive.
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Sample Size: 1x1cm, ~30-40% SiO<sub>2</sub> masking (NingC's pattern). Silicon carrier, no adhesive.
 
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|-
 
|Date
 
|Date
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|1297
 
|1297
 
|15.3
 
|15.3
|~30-40% SiO<sub>2</sub> masking (NingC's pattern)
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|
 
|[https://wiki.nanotech.ucsb.edu/w/images/3/3e/Unaxis_01_45D_002.jpg <nowiki>[1]</nowiki>] [https://wiki.nanotech.ucsb.edu/w/images/7/71/Unaxis_01_CS_001.jpg <nowiki>[2]</nowiki>]
 
|[https://wiki.nanotech.ucsb.edu/w/images/3/3e/Unaxis_01_45D_002.jpg <nowiki>[1]</nowiki>] [https://wiki.nanotech.ucsb.edu/w/images/7/71/Unaxis_01_CS_001.jpg <nowiki>[2]</nowiki>]
 
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Revision as of 10:36, 20 April 2022

UnderConstruction.jpg

Work In Progress

This article is still under construction. It may contain factual errors. Content is subject to change.


Data - InP Ridge Etch (Unaxis VLR)

PECVD SiO2 hardmask, patterned on Stepper #2 (AutoStep 200) & Panasonic ICP #1

InP Ridge Etch: °C, mT, W/W, Cl2=, H2=, CH4=sccm, time=1min30sec (90sec)

Sample Size: 1x1cm, ~30-40% SiO2 masking (NingC's pattern). Silicon carrier, no adhesive.

Date Sample# Etch Rate (nm/min) Etch Selectivity (InP/SiO2) Comments SEM Images
3/30/22 NP_Unaxis_02 1413 14.6 [1] [2]
3/9/22 NP_Unaxis_01 1297 15.3 [1] [2]