Difference between revisions of "Unaxis VLR Etch - Process Control Data"

Revision as of 15:51, 26 April 2022

Work In Progress

This article is still under construction. It may contain factual errors. Content is subject to change.

InP Ridge Etch: 200°C, 1.4mT, 800W/125W, Cl₂=6.3, H₂=12.7, Ar=2.0 sccm, time=1min30sec (90sec) Sample Size: 1x1cm epi-grade InP, ~30-40% SiO₂ masking (NingC's pattern). Silicon carrier, no adhesive. Conditioning: Prior to the etch, do O2 clean 15 minutes, then, chamber coating with the same recipe on 1/4-2" InP on Silicon carrier for 15 minutes.
Date	Sample#	Etch Rate (nm/min)	Etch Selectivity (InP/SiO2)	Comments	SEM Images
3/30/22	NP_Unaxis_02	1413	14.6		[1] [2]
3/9/22	NP_Unaxis_01	1297	15.3		[1] [2]

@@ Line 4: / Line 4: @@
 [[PECVD1-(PlasmaTherm 790)|PECVD SiO2]] hardmask, patterned on [[Stepper 1 (GCA 6300)|Stepper #2 (AutoStep 200)]] & [[ICP Etch 1 (Panasonic E626I)|Panasonic ICP #1]]
 {| class="wikitable"
-| colspan="6" |'''InP Ridge Etch''':    °C, mT, 800W/125W, Cl2=6.3, H2=12.7, Ar=2sccm, time=1min30sec (90sec)
+| colspan="6" |'''InP Ridge Etch''': 200°C, 1.4mT, 800W/125W, Cl<sub>2</sub>=6.3, H<sub>2</sub>=12.7, Ar=2.0 sccm, time=1min30sec (90sec)
-Sample Size: 1x1cm, ~30-40% SiO<sub>2</sub> masking (NingC's pattern). Silicon carrier, no adhesive.
+''Sample Size:'' 1x1cm epi-grade InP, ~30-40% SiO<sub>2</sub> masking (NingC's pattern). Silicon carrier, no adhesive.
+''Conditioning:'' Prior to the etch, do O2 clean 15 minutes, then, chamber coating with the same recipe on 1/4-2" InP on Silicon carrier for 15 minutes.
 |-
 |Date