Difference between revisions of "Unaxis VLR Etch - Process Control Data"

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(comments on undercut profile from 3/29/22)
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[[PECVD1-(PlasmaTherm 790)|PECVD SiO2]] hardmask, patterned on [[Stepper 1 (GCA 6300)|Stepper #2 (AutoStep 200)]] & [[ICP Etch 1 (Panasonic E626I)|Panasonic ICP #1]]  
 
[[PECVD1-(PlasmaTherm 790)|PECVD SiO2]] hardmask, patterned on [[Stepper 1 (GCA 6300)|Stepper #2 (AutoStep 200)]] & [[ICP Etch 1 (Panasonic E626I)|Panasonic ICP #1]]  
 
{| class="wikitable"
 
{| class="wikitable"
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|- bgcolor="#fcfcfc"
 
| colspan="6" |'''InP Ridge Etch''': 200°C, 1.4mT, 800W/125W, Cl<sub>2</sub>=6.3, H<sub>2</sub>=12.7, Ar=2.0 sccm, time=1min30sec (90sec)
 
| colspan="6" |'''InP Ridge Etch''': 200°C, 1.4mT, 800W/125W, Cl<sub>2</sub>=6.3, H<sub>2</sub>=12.7, Ar=2.0 sccm, time=1min30sec (90sec)
 
''Sample Size:'' 1x1cm epi-grade InP, ~30-40% SiO<sub>2</sub> masking (NingC's pattern). Silicon carrier, no adhesive.
 
''Sample Size:'' 1x1cm epi-grade InP, ~30-40% SiO<sub>2</sub> masking (NingC's pattern). Silicon carrier, no adhesive.
  
 
''Conditioning:'' Prior to the etch, do O2 clean 15 minutes, then, chamber coating with the same recipe on 1/4-2" InP on Silicon carrier for 15 minutes.
 
''Conditioning:'' Prior to the etch, do O2 clean 15 minutes, then, chamber coating with the same recipe on 1/4-2" InP on Silicon carrier for 15 minutes.
|-
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|- bgcolor="#e4e7ed"
|Date
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|'''Date'''
|Sample#
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|'''Sample#'''
|Etch  Rate (nm/min)
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|'''Etch  Rate (nm/min)'''
|Etch  Selectivity (InP/SiO2)
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|'''Etch  Selectivity (InP/SiO2)'''
|Comments
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|'''Comments'''
|SEM Images
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|'''SEM Images'''
 
|-
 
|-
 
|4/28/22
 
|4/28/22
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|1.41
 
|1.41
 
|14.6
 
|14.6
|Strong undercut!  
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|Strong undercut!
 
|[https://wiki.nanotech.ucsb.edu/w/images/8/84/Unaxis_02_45D_002.jpg <nowiki>[1]</nowiki>] [https://wiki.nanotech.ucsb.edu/w/images/6/60/Unaxis_02_CS_002.jpg <nowiki>[2]</nowiki>]
 
|[https://wiki.nanotech.ucsb.edu/w/images/8/84/Unaxis_02_45D_002.jpg <nowiki>[1]</nowiki>] [https://wiki.nanotech.ucsb.edu/w/images/6/60/Unaxis_02_CS_002.jpg <nowiki>[2]</nowiki>]
 
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Revision as of 15:47, 29 September 2022

Data - InP Ridge Etch (Unaxis VLR)

PECVD SiO2 hardmask, patterned on Stepper #2 (AutoStep 200) & Panasonic ICP #1

InP Ridge Etch: 200°C, 1.4mT, 800W/125W, Cl2=6.3, H2=12.7, Ar=2.0 sccm, time=1min30sec (90sec)

Sample Size: 1x1cm epi-grade InP, ~30-40% SiO2 masking (NingC's pattern). Silicon carrier, no adhesive.

Conditioning: Prior to the etch, do O2 clean 15 minutes, then, chamber coating with the same recipe on 1/4-2" InP on Silicon carrier for 15 minutes.

Date Sample# Etch Rate (nm/min) Etch Selectivity (InP/SiO2) Comments SEM Images
4/28/22 NP_Unaxis_03 1.51 22.2 Normal profile - vertical and smooth. [1] [2]
3/30/22 NP_Unaxis_02 1.41 14.6 Strong undercut! [1] [2]
3/9/22 NP_Unaxis_01 1.30 15.3 [1] [2]
11/8/2021 InP#2102 1.24 13.8 [1][2]
2/3/2021 InP#2101 1.30 16 [3][4]
8/30/2020 InP#2001 1.11 10.4 [5]
1/31/2019 InP#1901 0.88 9.7 [6][7]
12/10/2018 InP#1809 1.01 11.4 [8]
10/3/2018 InP#1808 1.01 13.7 [9]
8/7/2018 InP#1807 0.81 8.0 [10]
5/22/2018 InP#1806 0.88 8.4 [11]
4/26/2018 InP#1805 1.29 13.6 [12]
4/10/2018 InP#1804 1.12 12.8 [13]
4/5/2018 InP#1803 1.05 11.9 [14]
3/1/2018 InP#1802 0.96 9 [15]
1/2/2018 InP#1801 1.44 14.3 [16]
12/7/2017 InP#1714 0.96 10.4 [17]
11/21/2017 InP#1713 1.04 12.1 [18]
10/23/2017 InP#1712 1.11 13.1 [19]
10/11/2017 InP#1711 1 11 [20]
8/28/2017 InP#1710 1 11.7 [21]
8/16/2017 InP#1709 0.76 8 [22]
7/6/2017 InP#1708 0.98 12.1 [23]
5/19/2017 InP#1707 0.82 9.9 [24]
5/4/2017 InP#1706 0.84 11 [25]
4/20/2017 inP#1705 0.88 10.2 [26]
3/21/2017 InP#1704 1.01 11.3 [27]
2/21/2017 InP#1703 0.91 11.3 [28]
2/7/2017 InP#1702 0.75 7.7 [29]
1/23/2017 InP#1701 0.93 9.4 [30]
12/15/2016 InP#1615 0.91 9.3 [31]
12/1/2016 InP#1614 0.96 12.1 [32]
10/4/2016 InP#1613 0.92 8.9 [33]