Difference between revisions of "Oxford ICP Etcher - Process Control Data"

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(described basic 'fab process)
(updated tables, split into "sample size dpeendence" table)
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[[PECVD1-(PlasmaTherm 790)|PECVD SiO2]] hardmask, patterned on [[Stepper 1 (GCA 6300)|Stepper #2 (AutoStep 200)]] & [[ICP Etch 1 (Panasonic E626I)|Panasonic ICP #1]]
 
[[PECVD1-(PlasmaTherm 790)|PECVD SiO2]] hardmask, patterned on [[Stepper 1 (GCA 6300)|Stepper #2 (AutoStep 200)]] & [[ICP Etch 1 (Panasonic E626I)|Panasonic ICP #1]]
 
{| class="wikitable"
  
{| class="wikitable"
−
| colspan="6" |'''InP Ridge Etch''': 60°C, 3mT, 800W/65W, Cl2=18, H2=15, CH4=10sccm, time=5min05sec (305sec)
 +
| colspan="6" |'''InP Ridge Etch''': 60°C, 3mT, 800W/65W, Cl2=18, H2=15, CH4=10sccm, time=5min00sec (300sec)
  +
Silicon carrier, no adhesive. Sample Size: 1x1cm, ~30-40% SiO<sub>2</sub> masking (NingC's pattern)
 
|-
  
|-
 
|Date
  
|Date
 
|Sample#
  
|Sample#
  +
|Etch Rate (nm/min)
  +
|Etch Selectivity (InP/SiO2)
  +
|Comments
  +
|SEM Images
  +
|-
  +
|1/26/22
  +
|<small>NiravP</small>
  +
|
  +
|
  +
|
  +
|
  +
|}
  +
  +
=== Dependence on Sample Size ===
  +
We have found that the size of the InP piece loaded (no adhesive, onto Silicon carrier wafer) affects the etch rate, but does not affect the etch profile - ie. etches are still smooth and vertical, but rate varies with sample area.
  +
{| class="wikitable"
  +
| colspan="8" |'''InP Ridge Etch''': 60°C, 3mT, 800W/65W, Cl2=18, H2=15, CH4=10sccm, time=5min05sec (305sec)
  +
|-
  +
|Date
  +
|Sample#
  +
|Sample Size (dimensions, mm)
  +
|Sample Size (area, mm<sup>2</sup>)
 
|Etch Rate (nm/min)
  
|Etch Rate (nm/min)
 
|Etch Selectivity (InP/SiO2)
  
|Etch Selectivity (InP/SiO2)
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|-
  
|-
 
|1/11/22
  
|1/11/22
−
|<small>DJ_Cal</small>
 +
|<small>DJ_InPRidge</small>
  +
|4.5 x 2.5
  +
|11.25
 
|0.602
  
|0.602
 
|64.6nm left
  
|64.6nm left
  +
|
−
|Software timing bugs fixed - new etch rate will appear slightly higher.
  
 
|[https://wiki.nanotech.ucsb.edu/w/images/9/90/2022-01-11_Oxford_InP_Ridge_Wiki_Post_-_Cal01.pdf]
  
|[https://wiki.nanotech.ucsb.edu/w/images/9/90/2022-01-11_Oxford_InP_Ridge_Wiki_Post_-_Cal01.pdf]
 
|-
  
|-
 
|1/12/22
  
|1/12/22
−
|<small>DJ_Cal02</small>
 +
|<small>DJ_InPRidge</small>
  +
|4.5 x 3
  +
|13.5
 
|0.563
  
|0.563
 
|76.4nm left
  
|76.4nm left
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|-
  
|-
 
|1/12/22
  
|1/12/22
−
|<small>DJ_Cal03</small>
 +
|<small>DJ_InP#3</small>
  +
|4.5 x 3
  +
|13.5
 
|0.612
  
|0.612
 
|71nm left
  
|71nm left
 
|
  
|
 
|[https://wiki.nanotech.ucsb.edu/w/images/f/ff/2022-01-12_Oxford_InP_Ridge_Wiki_Post_-_Cal03.pdf]
  
|[https://wiki.nanotech.ucsb.edu/w/images/f/ff/2022-01-12_Oxford_InP_Ridge_Wiki_Post_-_Cal03.pdf]
  +
|-
−
|}<br />
  
  +
|1/26/22
  +
|<small>NiravP</small>
  +
|10 x 10
  +
|100
  +
|
  +
|
  +
|
  +
|
  +
|-
  +
|1/26/22
  +
|<small>NiravP</small>
  +
|1/4 of 50mm wafer
  +
|490
  +
|
  +
|
  +
|
  +
|
  +
|}

Revision as of 17:06, 28 January 2022

Data - InP Ridge Etch (Oxford ICP Etcher)

PECVD SiO2 hardmask, patterned on Stepper #2 (AutoStep 200) & Panasonic ICP #1

InP Ridge Etch: 60°C, 3mT, 800W/65W, Cl2=18, H2=15, CH4=10sccm, time=5min00sec (300sec)

Silicon carrier, no adhesive. Sample Size: 1x1cm, ~30-40% SiO2 masking (NingC's pattern)

Date Sample# Etch Rate (nm/min) Etch Selectivity (InP/SiO2) Comments SEM Images
1/26/22 NiravP

Dependence on Sample Size

We have found that the size of the InP piece loaded (no adhesive, onto Silicon carrier wafer) affects the etch rate, but does not affect the etch profile - ie. etches are still smooth and vertical, but rate varies with sample area.

InP Ridge Etch: 60°C, 3mT, 800W/65W, Cl2=18, H2=15, CH4=10sccm, time=5min05sec (305sec)
Date Sample# Sample Size (dimensions, mm) Sample Size (area, mm2) Etch Rate (nm/min) Etch Selectivity (InP/SiO2) Comments SEM Images
1/11/22 DJ_InPRidge 4.5 x 2.5 11.25 0.602 64.6nm left [1]
1/12/22 DJ_InPRidge 4.5 x 3 13.5 0.563 76.4nm left [2]
1/12/22 DJ_InP#3 4.5 x 3 13.5 0.612 71nm left [3]
1/26/22 NiravP 10 x 10 100
1/26/22 NiravP 1/4 of 50mm wafer 490
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