ICP Etching Recipes

Back to Dry Etching Recipes.

DSEIII_(PlasmaTherm/Deep_Silicon_Etcher)

High Rate Bosch Etch (DSEIII)

• Bosch Process

Single-Step Low Etch Rate Smooth Sidewall Process (DSEIII)

• Single Step Process

Si Deep RIE (PlasmaTherm/Bosch Etch)

Bosch and Release Etch (Si Deep RIE)

• Bosch and Release Processes
  • Ideal for deep (>>1µm), vertical etching of Silicon. Through-wafer etches are possible (requires carrier wafer).
  • Etch rate depends on area of exposed silicon being etched.
  • Al₂O₃ mask (ALD or Sputter) has >9000:1 selectivity
  • SiO₂ (PECVD) mask has ~100:1 selectivity
  • Thermal SiO₂ has ~300:1 selectivity.

Single-step Si Etching (not Bosch Process!) (Si Deep RIE)

• Single-step Si Vertical Etch Recipe - SF₆-C₄F₈-Ar

ICP Etch 1 (Panasonic E626I)

SiO₂ Etching (Panasonic 1)

• SiO₂ Vertical Etch Recipe Parameters - CHF₃ "SiOVert"
  • Etch rate ≈ 2300Å/min (users must calibrate)
  • Selectivity (SiO2:Photoresist) ≈ greater than 1:1 (users must calibrate)
• SiO₂ CHF₃ Etch Variations
• CF4/CHF4/O2 "NanoEtch" (TBA)

SiN_x Etching (Panasonic 1)

• SiN_x Etch Rates and Variations - CF₄-O₂

Al Etch (Panasonic 1)

• Al Etch Recipes - Cl₂BCl₃
• AlCl₃ Erosion Issue and the Solution

Cr Etch (Panasonic 1)

• Cr Etch Recipes - Cl₂O₂

Ti Etch (Panasonic 1)

• Ti Deep Etch Recipes - Cl₂Ar

W-TiW Etch (Panasonic 1)

• Ti-TiW Etch Recipes - SF₆Ar

GaAs-AlGaAs Etch (Panasonic 1)

• GaAs-Nanoscale Etch Recipe - PR mask - Cl₂-BCl₃-Ar
• AlGaAs Etch Recipes - Cl₂N₂
• GaAs DRIE via Etch Recipes - Cl₂-BCl₃-Ar PR passivation

GaN Etch (Panasonic 1)

• GaN Etch Recipes Cl₂N₂
• GaN Selective Etch over AlGaN Recipes BCl₃-SF₆

SiC Etch (Panasonic 1)

• SiC Etch Recipes Ni Mask - SF₆

Sapphire Etch (Panasonic 1)

• Sapphire Etch Recipes Ni and PR Mask - BCl₃-Cl₂

ICP Etch 2 (Panasonic E640)

Recipes starting points for materials without processes listed can be obtained from Panasonic1 recipe files. The chambers are slightly different, but essentially the same, requiring only small program changes to obtain similar results.

SiO₂ Etching (Panasonic 2)

• SiO₂ Vertical Etch Recipe - CHF₃ "SiOVert"
  • Direct copy of "SiOVert" from ICP#1, see parameters there.
• SiO₂ Vertical Etch Recipe#2 - CF₄/CHF₃
• SiO₂ Nanoscale Etch Recipe - CHF₃/O₂
• Angled SiO2 sidewall recipe

SiN_x Etching (Panasonic 2)

• SiN_x Nanoscale Etch Recipe - CHF₃/O₂

Al Etch (Panasonic 2)

• Al Etch Recipes - use panasonic 1 parameters, etch rate 50% higher

Al2O3 Etching (Panasonic 2)

ALD Al2O3 Etch Rates in BCl3 Chemistry (click for plots of etch rate)

Contributed by Brian Markman, 2018

• BCl3 = 30sccm
• Pressure = 0.50 Pa
• ICP Source RF = 500
• Bias RF = 50W or 250W (250W can burn PR)
• Cooling He Flow/Pressure = 15.0 sccm / 400 Pa
• Etch Rate 50W: 0.66nm/sec
• Etch Rate 250W: 1.0 nm/sec

GaAs Etch (Panasonic 2)

• GaAs Etch Recipes - Panasonic 2 - Cl₂N₂

Photoresist and ARC etching

Basic recipes for etching photoresist and Anti-Reflection Coating (ARC) underlayers are as follows:

ARC Etching: DUV-42P or AR6

• O2 = 40 sccm // 0.5 Pa
• ICP = 75W // RF = 75W
• 45 sec for full etching of DUV-42P (same for AR6)

UV6-0.8 Etching

Works very well for photoresist stripping

• O2 = 40 sccm // 1.0 Pa
• ICP = 350W // RF = 100W
• Etch Rate = 518.5nm / 1min
• 2m30sec to fully remove with ~50% overetch

ICP-Etch (Unaxis VLR)

GaAs-AlGaAs Etch (Unaxis VLR)

• GaAs Etch Recipe (Cl₂N₂ 30C)
• AlGaAs Etch Recipe (Cl₂N₂ 30C)

InP-InGaAs-InAlAs Etch (Unaxis VLR)

• InP Etch Recipe (Cl₂N₂Ar 200C)
• InP-based Material Etch Profile (Cl₂N₂Ar200C)
• Unaxis InP Etch Recipe (Cl₂H₂ Ar 200C) Parameters
• InP-InGaAs Etch Profile (Cl₂H₂ Ar 200C)
• InGaAs-InAlAs Etch Issure (Cl₂H₂ Ar 200C)
• InP Etch (Cl₂H₂Ar 200C)2-17-2016
• InP Etch (Cl₂H₂Ar 200C) Start on 6-3-2016
• test
• Lower etch-rate InP Etch (Cl₂N₂ 200C)

GaN Etch (Unaxis VLR)

• GaN Etch Recipe (Cl₂BCl₃N₂Ar 85C)