Difference between revisions of "ICP Etching Recipes"
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==GaAs-AlGaAs Etch (Panasonic 1)== |
==GaAs-AlGaAs Etch (Panasonic 1)== |
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| + | *[[media:Panasonic1-GaAs-PhotonicCrystal-RIE-Plasma-Nanoscale-Etch-RevA.pdf|GaAs-Nanoscale Etch Recipe - PR mask - Cl<sub>2</sub>-BCl<sub>3</sub>-Ar]] |
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*[[media:12-Plasma_Etching_of_AlGaAs-Panasonic_ICP-1-Etcher.pdf|AlGaAs Etch Recipes - Cl<sub>2</sub>N<sub>2</sub>]] |
*[[media:12-Plasma_Etching_of_AlGaAs-Panasonic_ICP-1-Etcher.pdf|AlGaAs Etch Recipes - Cl<sub>2</sub>N<sub>2</sub>]] |
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*[[media:Panasonic1-GaAs-Via-Etch-Plasma-RIE-Fast-DRIE-RevA.pdf|GaAs DRIE via Etch Recipes - Cl<sub>2</sub>-BCl<sub>3</sub>-Ar PR passivation]] |
*[[media:Panasonic1-GaAs-Via-Etch-Plasma-RIE-Fast-DRIE-RevA.pdf|GaAs DRIE via Etch Recipes - Cl<sub>2</sub>-BCl<sub>3</sub>-Ar PR passivation]] |
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Revision as of 13:40, 24 October 2013
Back to Dry Etching Recipes.
Si Deep RIE (PlasmaTherm/Bosch Etch)
Single-step Si Etching (not Bosch Process!) (Si Deep RIE)
ICP Etch 1 (Panasonic E626I)
SiO2 Etching (Panasonic 1)
SiNx Etching (Panasonic 1)
Al Etch (Panasonic 1)
Cr Etch (Panasonic 1)
Ti Etch (Panasonic 1)
W-TiW Etch (Panasonic 1)
GaAs-AlGaAs Etch (Panasonic 1)
- GaAs-Nanoscale Etch Recipe - PR mask - Cl2-BCl3-Ar
- AlGaAs Etch Recipes - Cl2N2
- GaAs DRIE via Etch Recipes - Cl2-BCl3-Ar PR passivation
GaN Etch (Panasonic 1)
ICP Etch 2 (Panasonic E640)
SiO2 Etching (Panasonic 2)
SiNx Etching (Panasonic 2)
Al Etch (Panasonic 2)
GaAs Etch (Panasonic 2)
ICP-Etch (Unaxis VLR)
GaAs-AlGaAs Etch (Unaxis VLR)
InP-InGaAs-InAlAs Etch (Unaxis VLR)
- InP Etch Recipe (Cl2N2Ar 200C)
- InP-based Material Etch Profile (Cl2N2Ar200C)
- Unaxis InP Etch Recipe (Cl2H2 Ar 200C) Parameters
- InP-InGaAs Etch Profile (Cl2H2 Ar 200C)