Difference between revisions of "ICP Etching Recipes"

From UCSB Nanofab Wiki
Jump to navigation Jump to search
Line 52: Line 52:
  
 
===InP Etch (H<sub>2</sub> Ar)===
 
===InP Etch (H<sub>2</sub> Ar)===
*[[media:UNAXIS-VLR-InP-Etch-Ar-200C-Recipe.pdf|InP Etch Recipe (H<sub>2</sub> Ar 200C)]]
+
*[[media:UNAXIS-VLR-InP-Etch-Ar-200C-Recipe.pdf|Unaxis InP Etch Recipe (H<sub>2</sub> Ar 200C) Parameters]]
 
*[[media:17-InP%26InGaAs_etch-Cl2H2Ar-Unaxis-VLR.pdf|InP-InGaAs Etch Profile (H<sub>2</sub> Ar 200C)]]
 
*[[media:17-InP%26InGaAs_etch-Cl2H2Ar-Unaxis-VLR.pdf|InP-InGaAs Etch Profile (H<sub>2</sub> Ar 200C)]]
  
 
==GaN Etch (Unaxis VLR)==
 
==GaN Etch (Unaxis VLR)==
 
*[[media:09-Plasma_Etching_of_GaN-UnaxisPM1.pdf|GaN Etch Recipe (85C)]]
 
*[[media:09-Plasma_Etching_of_GaN-UnaxisPM1.pdf|GaN Etch Recipe (85C)]]

Revision as of 08:16, 23 October 2013

Back to Dry Etching Recipes.

Si Deep RIE (PlasmaTherm/Bosch Etch)

Single-step Si Etching (not Bosch Process!) (Si Deep RIE)

ICP Etch 1 (Panasonic E626I)

SiO2 Etching (Panasonic 1)

SiNx Etching (Panasonic 1)

Al Etch (Panasonic 1)

Cr Etch (Panasonic 1)

Ti Etch (Panasonic 1)

AlGaAs Etch (Panasonic 1)

GaN Etch (Panasonic 1)

ICP Etch 2 (Panasonic E640)

SiO2 Etching (Panasonic 2)

SiNx Etching (Panasonic 2)

Al Etch (Panasonic 2)

GaAs Etch (Panasonic 2)

ICP-Etch (Unaxis VLR)

GaAs Etch

AlGaAs Etch

InP Etch (Unaxis VLR)

InP Etch

InP Etch (H2 Ar)

GaN Etch (Unaxis VLR)